This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 11-278225, filed Sep. 30, 1999, the entire contents of which are incorporated herein by reference.
This invention relates to a high-speed memory device constructed by connecting a plurality of flat high-seed memory modules to one another, each module having input and output side terminals arranged on one side thereof, for dealing with a high-speed signal of plural-bit width, impedance of the high-speed signal being controlled, and the high-speed signal is transmitted from a memory controller to a terminal resistor.
Further, this invention relates to a high-speed memory device constructed by connecting a plurality of flat high-seed memory modules to one another, each module having a metal cover on the surface thereof ,and each module including a connector that has two sets of terminals arranged on one side thereof, for dealing with a high-speed signal of plural-bit width, impedance of the high-speed signal being controlled.
There is provided a high-speed memory device constructed by connecting a plurality of flat high-seed memory modules to one another, each module having input and output side terminals arranged on one side thereof, for dealing with a high-speed signal of plural-bit width, impedance of the high-speed signal being controlled. The high-speed signal is transmitted from a memory controller to a terminal resistor. As the memory device, for example, there is provided a memory device which is realized by use of the mounting technology of an SO-RIMM (RIKM (Rambus Inline Memory Module) for notebook-sized personal computer proposed by U.S. Rambus Co.).
For the SO-RIMM, a socket (SO-RIMM socket) is used. In the general layout, a memory controller, first SO-RIMM socket, second SO-RIMM socket and terminal resistor are linearly arranged. Further, for a Rambus signal which requires preset impedance precision, a multi-layered circuit board of eight or more layers is used and the impedance matching is maintained by transmitting the Rambus signal through the internal layer of the circuit board.
FIG. 1 shows the outer armor structure of the SO-RIMM. An SO-RIMM 50 has a flat rectangular shape. On one side of the SO-RIMM, connector portions 51a, 51b respectively having input side and output side terminals for a Rambus signal which is transmitted from a memory controller to a terminal resistor are arranged. Further, a metal cover (heat-spreader also having a function of protection) 52 is disposed on the module surface.
By use of an SO-RIMM socket or sockets, SO-RIMMS are electrically connected to each other, and the SO-RIMM of the above structure is electrically connected to a memory controller, terminal resistor module, clock generator or the like.
If the high-speed memory device is realized by connecting a plurality of SO-RIMMs in a cascade-connection form, a multi-layered circuit board of eight or more layers is used so as to permit the Rambus signal to be transmitted along the internal layer. Therefore, a problem that the cost will be greatly increased occurs. Further, if the Rambus signal is transmitted through the internal layer, it becomes difficult to enhance the impedance precision in comparison with a case wherein the Rambus signal is transmitted along the surface layer. Therefore, there occurs a problem that the manufacturing cost will be raised owing to difficulty in the design and a low manufacturing yield caused by requirement for high precision on the manufacturing process.
An object of this invention is to provide a high-speed memory device in which high-speed memory modules can be cascade-connected with an inexpensive multi-layered circuit board structure and the impedance for a memory bus signal can be kept constant, a socket mounting structure of the high-speed memory device, and a mounting method for the high-speed memory device.
Another object of this invention is to provide a high-speed memory device for effecting a stable a high-speed memory operation with an inexpensive multi-layered circuit board structure by transmitting a high-speed signal of plural-bit width whose impedance is kept constant through a plurality of cascade-connected high-speed memory modules by use of the surface pattern of a multi-layered circuit board, a socket mounting structure of the high-speed memory device, and a mounting method for the high-speed memory device.
Still another object of this invention is to provide a high-speed memory device in which an inexpensive mother board with a less number of layers which is advantageous in cost is used when the high-speed memory device is realized by use of a plurality of SO-RIMMs, a Rambus signal which requires preset impedance precision is wired on the surface layer thereof and the SO-RIMM is stably operated by use of the mother board with an inexpensive layer structure without giving any influence on the Rambus signal pattern on the mother board even if the SO-RIMM is mounted, a socket mounting structure of the high-speed memory device, and a mounting method for the high-speed memory device.
According to this invention, the above object can be attained by-a memory device comprising:
a plurality of storage means for storing information;
means for controlling the storage means; means, having a resistance, for terminating an electric signal; and
a pattern wiring for electrically connecting the plurality of storage means, the controlling means and the terminating means;
wherein the plurality of storage means, the controlling means and the terminating means are arranged on a board, and the pattern wiring being located in a preset position on the board other than a position in which the storage means is located.
Further, according to this invention, the above object can be attained by a socket mounting structure of a memory device comprising:
a plurality of storage means for storing information;
means for controlling the storage means;
means, having a resistance, for terminating an electric signal; and
a pattern wiring for electrically connecting the plurality of storage means, the controlling means and the terminating means;
wherein the plurality of storage means, the controlling means and the terminating means are mounted on a board, and the pattern wiring being located in a preset position on the board other than a position in which the storage means is located.
Moreover, according to this invention, the above object can be attained by a mounting method of a memory device comprising:
mounting on a board a plurality of storage means for storing information;
mounting on the board a means for controlling the storage means;
mounting on the board a means, having a resistance, for terminating an electric signal; and
mounting on the board a pattern wiring for electrically connecting the plurality of storage means, the controlling means and the terminating means;
wherein the pattern wiring is located in a preset position on the board other than a position in which the storage means is located.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.